2010 Paper 7 Question 7 Comparative Architectures (a) Why is a shared second-level (L2) cache typically divided into multiple banks (banked) in a chip multiprocessor? [3 […]
2009 Paper 7 Question 7 Comparative Architectures (a) What dependencies exist between the instructions in the code fragment below? Identify both true data dependencies and name […]
2009 Paper 8 Question 2 Comparative Architectures (a) How does the use of condition codes (also known as condition bits or status flags) complicate the implementation […]
2008 Paper 7 Question 5 Comparative Architectures (a) Why are multi-level caches often used in preference to a single larger cache? How might the parameters of […]