1998 Paper 8 Question 4 Comparative Architectures Modern workstations typically have memory systems that incorporate two or three levels of caching. Explain why they are designed […]
1999 Paper 8 Question 4 Comparative Architectures A new microprocessor has a 64 Kbyte write-back L1 D-cache that is 2-way set-associative (employing a random replacement policy) […]
1999 Paper 7 Question 3 Comparative Architectures Why might a processor supporting “dynamic execution” (out-of-order execution with speculation) yield better performance than a statically-scheduled processor with […]
COMPUTER SCIENCE TRIPOS Part IB – 2021 – Paper 4 Compiler Construction (tgg22) (a) Suppose we are writing a compiler for an ML-like language and we […]